募捐 9月15日2024 – 10月1日2024 关于筹款
1
Hardware Acceleration of EDA Algorithms: Custom ICs, FPGAs and GPUs

Hardware Acceleration of EDA Algorithms: Custom ICs, FPGAs and GPUs

Kanupriya Gulati, Sunil P. Khatri (auth.)
年:
2010
语言:
english
文件:
PDF, 1.28 MB
0 / 0
english, 2010
2
On and Off-Chip Crosstalk Avoidance in VLSI Design

On and Off-Chip Crosstalk Avoidance in VLSI Design

Chunjie Duan, Brock J. LaMeres, Sunil P. Khatri (auth.)
年:
2010
语言:
english
文件:
PDF, 5.61 MB
0 / 0
english, 2010
3
Hardware Acceleration of EDA Algorithms: Custom ICs, FPGAs and GPUs

Hardware Acceleration of EDA Algorithms: Custom ICs, FPGAs and GPUs

Kanupriya Gulati, Sunil P. Khatri (auth.)
年:
2010
语言:
english
文件:
PDF, 1.34 MB
0 / 0
english, 2010
4
On and Off-Chip Crosstalk Avoidance in VLSI Design

On and Off-Chip Crosstalk Avoidance in VLSI Design

Chunjie Duan, Brock J. LaMeres, Sunil P. Khatri (auth.)
年:
2010
语言:
english
文件:
PDF, 5.55 MB
0 / 0
english, 2010
6
Minimizing and Exploiting Leakage in VLSI Design

Minimizing and Exploiting Leakage in VLSI Design

Nikhil Jayakumar, Suganth Paul, Rajesh Garg, Kanupriya Gulati, Sunil P. Khatri (auth.)
年:
2010
语言:
english
文件:
PDF, 4.56 MB
0 / 0
english, 2010
14
Minimizing and Exploiting Leakage in VLSI Design

Minimizing and Exploiting Leakage in VLSI Design

Nikhil Jayakumar, Suganth Paul, Rajesh Garg, Kanupriya Gulati, Sunil P. Khatri (auth.)
年:
2010
语言:
english
文件:
PDF, 5.78 MB
0 / 0
english, 2010
15
Minimizing and exploiting leakage in VLSI design

Minimizing and exploiting leakage in VLSI design

Nikhil Jayakumar, Suganth Paul, Rajesh Garg, Kanupriya Gulati, Sunil P. Khatri (auth.)
年:
2010
语言:
english
文件:
PDF, 2.09 MB
0 / 0
english, 2010